1. Field of the Invention
The present invention relates to a semiconductor device and a method of manufacturing the same.
Priority is claimed on Japanese Patent Application No. 2010-019278, filed Jan. 29, 2010, the content of which is incorporated herein by reference.
2. Description of the Related Art
With the higher integration of semiconductor devices, semiconductor elements used for semiconductor devices have been miniaturized. Recently, an STI (Shallow Trench Isolation) film, which is formed by filling a groove in a semiconductor layer with an insulating film, has been used. However, with the miniaturization of semiconductor elements, it has been becoming more difficult to fill a groove in a semiconductor layer with an STI film, thereby causing defective formation of the STI film.
For this reason, as a method of forming an STI film, Japanese Patent Laid-Open Publication No. 2002-203895 discloses a method of filling a groove in a semiconductor layer with an SOD (Spin On Dielectric) film and a silicon oxide (SiO2) film. The SOD film is formed by applying polysilazane or the like. The silicon oxide film is formed by a CVD (Chemical Vapor Deposition) method.
With the miniaturization of semiconductor elements, new type transistors have been used in lieu of the conventional planer transistors. New type transistors include a trench gate transistor that prevents the short channel effect. Japanese Patent Laid-Open Publication No. 2007-158269 discloses a trench gate transistor including a channel layer covering a side surface of a gate electrode trench.
However, even if the method of filling a groove in a semiconductor substrate with two insulating layers is used to form an STI film, defectives, such as voids, are included in the STI film in some cases.
Hereinafter, the problems of the semiconductor devices of the related art are explained in detail. FIG. 31A is a plan view illustrating one of processes included in a method of forming a DRAM (Dynamic Random Access Memory) according to the related art. FIG. 31B is an enlarged plan view illustrating part of a device formation region shown in FIG. 31A.
A semiconductor memory device shown in FIG. 31A has a memory cell region 100a and a peripheral region 100b outside the memory cell region 100a. The memory cell region 100a includes an STI film 800 and device formation regions 110a defined by the STI film 800. The STI film 800 is formed by filling a device isolation groove 400 in a semiconductor substrate 100 with a two-layered insulating film including a silicon nitride film and a silicon oxide film.
The device isolation groove 400, which defines a planar shape of the STI film 800, includes multiple linear grooves 401 and a connection groove 402. The linear grooves 401 extend in a direction crossing the Y direction shown in FIG. 31A. The connection groove 402 extends in the X and Y directions shown in FIG. 31A and connects the linear grooves 401.
A planar shape of the device formation region 110a is defined by the planar shape of the STI film 800. The device formation region 110a includes a first band portion 121, a second band portion 122, and multiple device formation portions 123. The first and second band portions 121 and 122 extend in the Y direction. The first and second band portions 121 and 122 oppose each other. The device formation portions 123 are positioned between the first and second band portions 121 and 122, and extend in a direction crossing the Y direction. Both ends 123a of each device formation portion 123 are separated from the first and second band portions 121 and 122.
Hereinafter, a method of forming the STI film 800 is explained. FIGS. 32A, 32B, 33A to 33D, 34A and 34B are cross-sectional views illustrating a process of forming the STI film 800 of the DRAM shown in FIGS. 31A and 31B. FIGS. 32A, 33A, and 34A are cross-sectional views taken along line A-A′ shown in FIG. 31B. FIGS. 32B, 33B, and 34B are cross-sectional views taken along line D-D′ shown in FIG. 31B. FIG. 33C is a cross-sectional view taken along line B-B′ shown in FIG. 31B. FIG. 33D is a cross-sectional view taken along line C-C′ shown in FIG. 31B. FIG. 32C is a perspective view illustrating the process. The lines C-C′ and D-D′ shown in FIG. 32C correspond to lines C-C′ and D-D′ shown in FIG. 31B.
To form the STI film 800 shown in FIGS. 31A and 31B, the device isolation groove 400, which includes the linear grooves 401 and the connection groove 402, is formed first, as shown in FIGS. 32A to 32C. Then, a silicon nitride film 601 is formed so as to fill the device isolation groove 400.
Then, a silicon nitride film 601 is partially removed by a wet etching process so that the silicon nitride film 600 remains in a bottom portion of the device isolation groove 400. The wet etching process is carried out such that the top level of the silicon nitride film 600 included in the linear grooves 401 matches a dotted line shown in FIGS. 33A to 33D.
After the wet etching process, the top level of the silicon nitride film 600 is highest in the longitudinal center region of the linear groove 401 as shown in FIG. 33A, and is lowest in the region of the connection groove 402 as shown in FIG. 33B. The top level of the silicon nitride film 600 decreases from the longitudinal center region of the linear groove 401 toward the connection groove 402, as shown in FIGS. 33A, 33C, and 33D.
After the wet etching process, a silicon oxide film is formed so as to fill the element formation groove 400. Then, a surface of the semiconductor substrate 100 is planarized. Thus, the two-layered STI film 800, which includes the silicon nitride film 600 and the silicon oxide film 700 over the silicon nitride film 600, can be formed as shown in FIGS. 34A and 34B.
In the case of the STI film 800 shown in FIGS. 31A and 31B, defectives, such as voids, have been likely to be included in the silicon oxide film 700 which is close to the connection groove 402.
The cause of the defectives is considered to be a variation in the top level of the silicon nitride film 600 filling the bottom portion of the device isolation groove 400. The variation in the top level of the silicon nitride film 600 is caused by an etchant for wet-etching the silicon nitride film 601 entering the narrow linear groove 401 from the wide connection groove 402. Consequently, the top level of the silicon nitride film 600 at a position close to the connection groove 402 becomes lower than that at the longitudinal center of the linear groove 401.
As a result, the aspect ratio of the linear groove 401 at a position close to the connection groove 402 becomes greater than that at other positions when the silicon oxide film 700 is formed after the silicon nitride film 600 is formed. Defectives are likely to occur at a portion of the linear groove 401 which has the great aspect ratio. Therefore, it can be considered that defectives, such as voids, are likely to be included in the silicon oxide film 700 filling the linear groove 401 that is close to the connection groove 402.
FIG. 35A is a plan view illustrating one of processes included in a method of forming another semiconductor memory device (DRAM) according to the related art. FIG. 35B is an enlarged view illustrating part of a memory cell region shown in FIG. 35A.
The semiconductor memory device shown in FIG. 35A differs from the semiconductor memory device shown in FIG. 31A in planar shapes of an STI film 801, a device isolation groove 410, and a device formation region 111a. Therefore, explanations of other elements are omitted here. The STI film 801 of the semiconductor memory device shown in FIGS. 35A and 35B is formed by the same method by which the STI film 800 shown in FIGS. 31A and 31B is formed.
As shown in FIG. 35A, the device isolation groove 410, which defines a planar shape of the STI film 801, includes multiple linear grooves 411. The linear grooves 411 extend in a direction crossing the Y direction shown in FIG. 35A.
A planar shape of the device formation region 111a shown in FIG. 35 is defined by the planar shape of the STI film 801. The device formation region 111a includes a first band portion 131, a second band portion 132, and multiple device formation portions 133. The first and second band portions 131 and 132 extend in the Y direction. The first and second band portions 131 and 132 oppose each other. The device formation portions 133 are positioned between the first and second band portions 131 and 132, and extend in a direction crossing the Y direction. Both ends 133a of each device formation portion 133 are connected to the first and second band portions 131 and 132.
In the case of the STI film 801 shown in FIG. 35, defectives, such as voids, have been likely to be included in the silicon oxide film 700 filling the end portions of the linear groove 411. The cause of the defectives is probably that the width of the linear groove 411 becomes narrower toward the end portion of the linear groove 411. The narrower the width of the linear groove 411 becomes, the greater the aspect ratio of the linear groove 411 becomes. For this reason, in the case of the STI film 801 shown in FIGS. 35A and 35B, defectives, such as voids, have been likely to be included in the silicon oxide film 700 filling the end portions of the linear groove 411.